As technology continues to advance at a rapid pace, TSMC (Taiwan Semiconductor Manufacturing Company) is preparing to meet what it expects will be record-breaking demand for its upcoming 2nm semiconductor production. This demand comes primarily from industry giants like Apple, who are always on the hunt for faster and more efficient chips to power their latest devices.
Reflecting on past innovations, the iPhone 7, launched in 2016, was equipped with the A10 Fusion chip, built by TSMC using a 16nm process node. Fast forward to 2025, and the anticipated iPhone 17 series will leverage the A19 and A19 Pro application processors, created using TSMC's third-generation 3nm technology (N3P).
The shrinking sizes of process nodes are crucial in chip development; with each reduction, more transistors can be fitted onto a single chip, enhancing both speed and energy efficiency. For example, while the A10 Fusion hosted 3.3 billion transistors, more recent iterations such as the A17 Pro boast about 19 billion. It can be expected that the forthcoming A18 Pro processor will further increase this count, possibly reaching between 20 billion to 25 billion transistors.
Reports indicate that TSMC is experiencing strong demand for its 3nm production node. However, interest in the new 2nm technology is even higher than in any prior nodes. Remarkably, the defect density rates for this new process have already matched those of the existing 3nm and 5nm processes, indicating swift progress in development.
Apple is anticipated to be TSMC’s largest customer for the 2nm node, expected to utilize the third-gen 3nm process for the iPhone 17, while planning to introduce 2nm chips in next year's iPhone 18 series. AMD has also announced its intention to be at the forefront of this advancement by incorporating 2nm chips in its upcoming Zen 6 Venice CPUs.
Transitioning to the 2nm process, TSMC is moving away from FinFET transistors and adopting the innovative Gate All Around (GAA) technology, which envelops the channel on all four sides. This provides notable improvements in reducing current leakage and enhances drive current, offering speeds that are projected to be 10% to 15% faster than the second-generation 3nm production (N3E).
By the end of this year, TSMC aims to produce a substantial number of 2nm wafers, forecasting an output of 50,000 units for 2025, each divided into hundreds or thousands of chips. Looking ahead to 2027, plans to triple wafer output to 150,000 are underway, which will significantly bolster TSMC's production capacity in Taiwan. Furthermore, by 2028, production shifts to also include the construction of 2nm chips at TSMC's US fabrication facilities in Arizona.
